The continued evolution of integrated circuits have enabled shrinking ever more powerful computational and communication functionality into smaller and smaller devices. As the devices have become smaller and device frequencies higher, these desired characteristics have given rise to challenges that if not dealt with will limit the evolution process. For example, the push to reduce the size of a device can necessitate rearranging sub-devices. The rearrangement can introduce less than ideal conditions for some functionality, such as, routing transmission lines of the device over reference plane voids. Such arrangements can cause distortion of signals using the transmission line.